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    73 repositories

    • website

      Public
      Public facing website
      Svelte
      •0•0•0•0•Updated Apr 14, 2026Apr 14, 2026

    • tools

      Public
      Software Tools
      Makefile
      •
      Apache License 2.0
      •0•2•0•3•Updated Apr 13, 2026Apr 13, 2026

    • verilator-python

      Public
      Python/PyPI wrapper for Verilator
      hardwareverilogsystemverilog
      hardwareverilogsystemverilogverilator
      Python
      •
      Apache License 2.0
      •1•7•0•0•Updated Apr 12, 2026Apr 12, 2026

    • dau-sim

      Public
      Cycle-accurate hardware simulator
      pythoncspfpga
      pythoncspfpgacppverilogsystemveriloghdlsystem-verilogcocotbamaranth-hdl
      Python
      •
      Apache License 2.0
      •0•1•0•0•Updated Apr 12, 2026Apr 12, 2026

    • dau-build

      Public
      Build tools for dau projects
      Python
      •
      Apache License 2.0
      •0•1•0•0•Updated Apr 12, 2026Apr 12, 2026

    • artlink

      Public
      A package for packaging, organizing, and combining artifacts
      Python
      •
      Apache License 2.0
      •0•1•0•0•Updated Apr 12, 2026Apr 12, 2026

    • uhdm-pypi

      Public
      PyPI Packaging for UHDM
      CMake
      •
      Apache License 2.0
      •0•1•0•0•Updated Mar 3, 2026Mar 3, 2026

    • amaranth-boards

      Public
      Board definitions for Amaranth HDL
      Python
      •
      BSD 2-Clause "Simplified" License
      •127•0•0•0•Updated Mar 2, 2026Mar 2, 2026

    • amaranth

      Public
      A modern hardware definition language and toolchain based on Python
      Python
      •
      BSD 2-Clause "Simplified" License
      •195•0•0•0•Updated Feb 28, 2026Feb 28, 2026

    • vivado-docker

      Public
      Minimal Dockerized Vivado
      fpgahardwarevhdl
      fpgahardwarevhdlverilogvivadosystemverilogverilog-hdl
      Shell
      •
      Apache License 2.0
      •0•2•0•0•Updated Apr 14, 2025Apr 14, 2025

    • nitefury-notes

      Public
      Notes setting up / using NiteFury
      Python
      •0•1•0•0•Updated Apr 2, 2025Apr 2, 2025

    • litex

      Public
      Build your hardware, easily!
      C
      •
      Other
      •703•0•0•0•Updated Mar 29, 2025Mar 29, 2025

    • litesdcard

      Public
      Small footprint and configurable SDCard core
      Python
      •
      Other
      •36•0•0•0•Updated Mar 28, 2025Mar 28, 2025

    • litei2c

      Public
      Small footprint and configurable I2C core
      Python
      •
      BSD 2-Clause "Simplified" License
      •4•0•0•0•Updated Mar 27, 2025Mar 27, 2025

    • litex-boards

      Public
      LiteX boards files
      Python
      •
      BSD 2-Clause "Simplified" License
      •350•0•0•0•Updated Dec 18, 2024Dec 18, 2024

    • litepcie

      Public
      Small footprint and configurable PCIe core
      Python
      •
      Other
      •158•1•0•0•Updated Dec 18, 2024Dec 18, 2024

    • litespi

      Public
      Small footprint and configurable SPI core
      Python
      •
      BSD 2-Clause "Simplified" License
      •26•0•0•0•Updated Dec 18, 2024Dec 18, 2024

    • synlig

      Public
      SystemVerilog support for Yosys
      Verilog
      •
      Apache License 2.0
      •29•0•0•0•Updated Dec 18, 2024Dec 18, 2024

    • basejump_stl

      Public
      BaseJump STL: A Standard Template Library for SystemVerilog
      SystemVerilog
      •
      Other
      •113•0•0•0•Updated Dec 18, 2024Dec 18, 2024

    • systemverilog-plugin

      Public
      SystemVerilog support for Yosys
      Verilog
      •
      Apache License 2.0
      •29•0•0•0•Updated Dec 18, 2024Dec 18, 2024

    • dma_ip_drivers

      Public
      Xilinx QDMA IP Drivers
      C
      •527•0•0•0•Updated Dec 18, 2024Dec 18, 2024

    • brevitas

      Public
      Brevitas: neural network quantization in PyTorch
      Python
      •
      Other
      •243•0•0•0•Updated Dec 18, 2024Dec 18, 2024

    • nextpnr-xilinx

      Public
      Experimental flows using nextpnr for Xilinx devices
      C++
      •
      ISC License
      •58•0•0•0•Updated Dec 18, 2024Dec 18, 2024

    • openFPGALoader

      Public
      Universal utility for programming FPGA
      C++
      •
      Apache License 2.0
      •334•1•0•0•Updated Dec 18, 2024Dec 18, 2024

    • amaranth-soc

      Public
      System on Chip toolkit for Amaranth HDL
      Python
      •
      BSD 2-Clause "Simplified" License
      •37•0•0•0•Updated Dec 18, 2024Dec 18, 2024

    • cocotb

      Public
      cocotb, a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python
      Python
      •
      BSD 3-Clause "New" or "Revised" License
      •636•0•0•0•Updated Dec 18, 2024Dec 18, 2024

    • UHDM

      Public
      Universal Hardware Data Model. A complete modeling of the IEEE SystemVerilog Object Model with VPI Interface, Elaborator, Serialization, Visitor and Listener. U…
      C++
      •
      Apache License 2.0
      •42•0•0•0•Updated Dec 18, 2024Dec 18, 2024

    • yosys

      Public
      Yosys Open SYnthesis Suite
      C++
      •
      ISC License
      •1.1k•0•0•0•Updated Dec 18, 2024Dec 18, 2024

    • RapidWright

      Public
      Build Customized FPGA Implementations for Vivado
      Java
      •
      Other
      •127•0•0•0•Updated Dec 18, 2024Dec 18, 2024

    • prjxray

      Public
      Documenting the Xilinx 7-series bit-stream format.
      Python
      •
      ISC License
      •164•0•0•0•Updated Dec 18, 2024Dec 18, 2024
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